✅ Implemented initial Apple Silicon detection using sysctl system calls
✅ Added proper M1/M2/M3/M4 generation detection via CPU brand string
✅ Fixed memory leaks that occured during dev with proper allocator cleanup
✅ Enhanced Metal backend foundation with device capabilities
✅ Added `test_m_series.zig` for hardware verification
🔧 Key Technical Improvements:
- Real hardware detection via `hw.model` (eg; `MacBookPro17,1`)
- CPU brand string parsing for accurate M-series identification
- Unified memory strategy detection (even under Rosetta)
- Apple Neural Engine capability detection
- Memory-safe device info structures
🧪 Verified on Apple Silicon:
- M1 correctly detected (generation 1, no variant)
- 16GB unified memory properly identified
- Builds cleanly with Zig `0.15.0-dev.703+597dd328e`
- No false positives for M1 Pro/Max/Ultra variants
📋 Updated README status to reflect experimental draft implementation
⚠️ Clearly marked as research/development foundation, not production ready
- Port HTTP server, and appropriate points across core etc from old API to Zig `0.15.0-dev` patterns
- Fix mutability, unused variables, and API compatibility issues
- Validate SIMD tensor operations and backend architecture
- Foundation now compiles cleanly and produces working binary
